1. Technical Field
Improved silicon wafers and methods of fabricating silicon wafers are disclosed. More specifically, silicon wafers with an ideal device active zones formed up to a certain distance from the front and rear surfaces of the wafer and with an internal region that has a constant density of oxygen precipitates and bulk stacking faults in a depth direction and a method of fabricating the silicon wafer are disclosed.
2. Description of the Related Art
Generally known defects causing problems in a silicon wafer include COPs (Crystal Originated Particle), FPDs (Flow Pattern Defect), and LSTDs (Laser Scattering Tomography Defect).
The COPs formed in a surface layer of the wafer are detected by repeating a cleaning process with a mixed solution (Standard Cleaning 1 solution) of ammonia and hydrogen peroxide. The COPs have sizes in a range of about 0.09 μm to about 0.12 μm and are observed in shapes of pits on the surface of the wafer. The COPs are known to be a type of defects which are induced at the time of pulling the crystal to form the wafer.
The FPDs which are related to the dielectric strength of an oxide film are known to be detected in a flow pattern by performing a selective etching process using an etchant such as hydrochloride solution or potassium dichromate solution.
The LSPDs which are observed as fine defects generated during the crystal growing process are known to be detected by a laser scattering tomography.
Typically, a method of fabricating a silicon wafer comprises a single crystal growing process for preparing a single crystal ingot, a slicing process for slicing the single crystal into wafers having a shape of a thin disk, a chamfering process for chamfering a circumferential edge portion of the wafer to prevent the wafer obtained in the slicing process from being broken and deformed, a lapping process for planarizing the wafer, a polishing process for polishing the surface of the wafer into a mirror, and a cleaning process for cleaning the polished wafer to remove polishing powders and contaminating particles attached on the wafer.
Silicon wafers fabricated by performing the aforementioned processes on the silicon single crystal which is grown by the so-called Czochralski (CZ) method contain large amounts of oxygen impurities. The oxygen impurities may be changed into oxygen precipitates which cause dislocations or defects. The presence of the oxygen precipitates on the surface where semiconductor devices are to be formed results in increasing leakage currents and weakening the dielectric strength of the oxide film, so that it can have a great effect on the properties of the semiconductor devices.
Silicon wafers fabricated in accordance with the aforementioned method need to secure the so-called “denuded zone” (DZ) up to a predetermined depth from the surface of the wafer. Herein, the denuded zone is a region in which no dislocations, stacking faults, oxygen precipitates, etc., exist from the front to the back of the wafer. However, in silicon wafers fabricated in accordance with the conventional method, the oxygen precipitates which are formed in surface regions function as sources of the leakage currents.
FIG. 1 is a view illustrating a concentration profile of defects of the silicon wafer which is obtained by growing an ingot and slicing the ingot in accordance to the general method. As shown in FIG. 1, the concentration of defects is highest at the central portion and is lower toward the surface of the wafer, so that the concentration profile has a shape of convex.
On the other hand, the aforementioned void defects and internal defects such as oxygen precipitates can be controlled by thermal treatment processes after the crystal growing process. One of the thermal treatment processes is a process using a diffusion furnace. In case of the process using the diffusion furnace, the thermal treatment process is performed in a H2 or Ar atmosphere at a high temperature of 1200° C. or more for one hour or more, and then, a device perfect zone is formed on some of the surface region of the wafer by means of the out-diffusion of the oxygen and the rearrangement of the silicon. In accordance with the conventional method using the diffusion furnace, a layer without any void defects and fine oxygen precipitates can be formed from the surface to the depth of 10 μm of the wafer. However, as the diameter of the wafer is getting larger and larger, the conventional method does not effectively control slip dislocations which are formed on the wafer due to a high-temperature thermal treatment process or contaminants which are formed due to the high-temperature thermal treatment process.